26Verification

Restart a frame checksum on its start byte

Problem

Intended behavior. FrameSum sums the bytes of each frame modulo 256. On a clock edge where valid is high, sum takes in data. If start is also high, the byte begins a new frame and sum becomes data; otherwise sum becomes sum + data. On an edge where valid is low, sum keeps its value, whatever start and data show. Reset clears sum to 0.

Current behavior. The first frame after reset adds up correctly. Later frames report sums that are too large, and a start held high through a bubble disturbs the result as well.

Your task. Find the defect with the circuit's own trace and make sum follow the contract. The hardware lives in FrameSum. TracedFrameSum adds a cycle counter and a printf to the same hardware, and the public run simulates it; keep that class and the ports unchanged.

Read and predict

The printf sits inside when (io.valid), so it fires only on edges where a byte is accepted. It reports values just before the edge: the cycle number, start, data, and the sum the register holds before taking the byte in. The public bench drives three frames, prints each frame's final sum from the port, and keeps start high during one bubble in frame 3.

Before running, write the expected FRAME line for each frame. For every trace line, also write the sum that the next trace line should show. Then run the starter.

Diagnose

Read the trace in pairs. After a line with start=1, the next line's sum must equal the start line's data, because the start byte replaced the old sum. Find the first pair where that fails, and use the cycle number to place it.

Then read the two when blocks that drive sum as hardware for one cycle, not as two statements that run one after the other. When both conditions hold on the same edge, only one connection to sum takes effect. Work out which one, and what the first block does on an edge where start is high and valid is low.

Completion check

A valid start byte replaces the sum with its own data. That includes a start byte of 0 and a start byte right after another start byte.
A valid byte without start adds to the sum modulo 256.
An edge with valid low changes nothing, even when start is high.
Reset clears the sum, also on an edge that presents a valid start byte.

Hints

Hint 1

Which connection to sum wins when start and valid are both high? The last-connect rule from the combinational circuits chapter applies to registers too.

Hint 2

Make valid the outer condition, since it decides whether sum changes at all. Inside it, let start choose between the two possible new values.

Concept

A printf is part of the circuit. Outside reset, it sees each register as it stands before the edge and fires only while its when condition holds. Gating it on valid gives one line per accepted byte. In the corrected design, consecutive trace lines with no reset between them show the sum before and after one accepted-byte update, even if bubbles separate them.

Variation

Move the printf out of when (io.valid) so that it fires on every edge. Predict how many trace lines frame 3 produces, and what the bubble's line shows for start and sum.