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21Implementation

Checkpoint A: select one of four operations

Problem

Intended behavior. SelectOp is one slice of a small ALU. The 2-bit sel names a bitwise operation on the 4-bit inputs a and b, and y carries that operation's result:

selOperationBit i of y
0AND1 when bit i of both a and b is 1
1OR1 when bit i of either input is 1
2XOR1 when the two bits differ
3NOR1 when both bits are 0

In Chisel the four results are a & b, a | b, a ^ b, and ~(a | b).

y is a combinational function of the three inputs. When an input changes, y changes in the same cycle; a register that waits for a clock edge does not meet the contract.

Current behavior. The starter drives y with a constant 0 so that it compiles. Every line of the public run prints y=0000.

Task. This checkpoint has no one-line bug to find: the body below the IO bundle is yours to write. Replace the TODO line with a selection that gives y the right value for every sel. Keep the ports and Main unchanged, and add no register.

Read the starter

The IO bundle fixes the port names and widths. sel is 2 bits, so it has exactly four values and none of them is spare. y is 4 bits, the same width as each operation's result, so no padding or truncation is involved. Nothing in the contract mentions the clock.

Predict before running

The public run pokes the (a, b) pairs (1100, 1010), (0011, 0101), and (1111, 0000), and for each pair prints y with sel from 0 to 3. Work out the twelve values a correct design prints, bit by bit. For (1100, 1010) the four lines are 1000, 1110, 0110, and 0001.

Make the change and explain

Pick the selection utility from the Learn chapter whose selector is one key compared with constants, and give it one entry per sel value. Run, compare the twelve lines with your prediction. For each of the first two input pairs, explain why the sel=3 result differs from the other three results. For (1111, 0000), identify which other operation gives the same result as NOR.

Completion check

  • For all 1024 (sel, a, b) combinations, y matches the table above, not only the twelve printed lines.
  • y follows an input change without a clock edge. A design that stores the result in a register and shows it one edge later does not meet the contract.
  • sel = 3 is the NOR of a and b: neither the NAND nor the inverted XOR.

Progressive hints

Hint 1

Four operations and one 2-bit selector have the shape of the Learn chapter's "five ways to say the same thing" example. The selector is a key compared with constants, not a list of independent conditions.

Hint 2

The utility that takes the key and a default in its first argument list, and the table of key -> value pairs in its second, needs neither when nor a register. With all four keys listed the default is never reached, but it still needs a value of the right type.

Hint 3

Parenthesize each operation when you pair it with its key. Without the parentheses -> binds before the bitwise operators, and the compile error points at the pair rather than at the operator.

Variation

Widen a, b, and y to 5 bits, or narrow them to 3. Which lines of your submission change, and which lines of the public output? Then imagine a fifth operation: sel grows by a bit, and a key without an entry now exists. Which value does your utility return for it, and is that the value you want?

Review this concept
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Main.scala