09Implementation

Turn a level into a one-cycle pulse

Problem

Intended behavior. rise_pulse watches a 1-bit input level and drives a registered output pulse. At each rising edge it compares the level it samples with the level it sampled at the previous edge. When the value went from 0 to 1, pulse is 1 for exactly the next clock period; otherwise pulse is 0. A level that stays high for many cycles therefore produces one pulse, not one per cycle. Reset is synchronous and active-high: it clears pulse and makes the remembered previous level 0.

Current behavior. The starter compiles, runs, and writes a waveform, but pulse simply copies level. In the public output, pulse is 1 on every line where level is 1, so the high run at cycles 1 to 3 produces one three-cycle high interval instead of a one-cycle pulse.

Your task. Edit the line under the TODO so that pulse marks only rising transitions of level. Keep prev, the reset branch, the ports, and the public testbench as they are.

Read the starter and the trace

Just before a rising edge, prev holds the level sampled at the previous rising edge. After the nonblocking updates, it holds the sample from the current edge. The testbench changes level on falling edges and prints on the following falling edge, so each line shows the level a rising edge sampled and the pulse that same edge produced.

Before editing, write the expected pulse column for the twelve cycles. Then open the waveform below the output and find tb.dut.prev. At each rising edge, compare level and prev just before the edge with pulse just after it. If the former values are 1 and 0, the edge starts a pulse even though prev also becomes 1 after that edge.

Fix, run, and confirm in the waveform

Change only the right-hand side under the TODO, run again, and compare the printed column with your prediction. Then check the waveform, not just the text:

• every pulse is high for one full clock period, from one rising edge to the next;
• pulse never changes between rising edges, even when level does;
• a falling transition of level does not start a new pulse; an existing pulse still lasts until the next rising clock edge.

Finally, explain in one sentence why pulse lags the rise of level by up to a cycle, using the combinational-versus-registered comparison from the Waveform chapter.

Completion check

• Every 0-to-1 transition between rising-edge samples of level produces exactly one high cycle of pulse, for any pattern, including alternating values and long runs of 1.
• pulse is a register output: it changes only at rising edges.
• After reset the previous level counts as 0, so a level already high on the first edge after reset produces one pulse. A rising edge with reset high clears pulse to 0; asserting reset between edges does not clear it immediately.

Progressive hints

Transfer experiment

Move all assignments to pulse, including its reset assignment, out of the clocked block. In a separate always @*, compute pulse from the same two names so that only this block drives it; keep prev clocked. Predict the printed column first: the testbench samples on the falling edge, after prev has caught up, so every line may read 0. Then look at the waveform and find the pulses that the text missed, starting at falling edges and ending at rising edges. Explain which view you would trust when the output must be stable for a whole cycle, and how you would detect falling transitions instead.